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AURIX TriCore内核架构学习笔记
名词缩写
- ISA - Instruction Set Architecture,指令集架构
- PC - Program Counter, holds the address of the instruction that is currently running
- GPRs - 32 General Purpose Registers
- PSW - Program Status Word
- PCXI - Previous Context Information
- CSA - Context Save Area,CSAs are linked together through a Link Word
- TIN - Trap Identification Number
- SP - Stack Pointer, A[10]
- ISP - Interrupt Stack Pointer Register
- SYSCON - System Control Register
- FCX - Free CSA List Head Pointer register
- PCX - Previous Context List
- ICR - Interrupt Control Register
- MFCR - Move From Core Register
- MTCR - Move To Core Register
The PCXI, PSW and PC registers are crucial to the procedure for storing and restoring a task’s context
- A[10] is the Stack Pointer (SP) register
- A[11] is the Return Address (RA) register
The events and instructions which cause a break in program execution are:
- Interrupt or service requests
- Traps
- Function calls
The maximum number of interrupt sources is 255
When a trap is taken, the TIN is placed in data register D[15]
The GPRs are an essential part of a task’s context. When saving or restoring a task’s context to and from memory the context is split into the upper and lower contexts:
- Registers A[2] to A[7] and D[0] to D[7] are part of the lower context.
- Registers A[10] to A[15] and D[8] to D[15] are part of the upper context.
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